ug_intro_to_megafunctions(10)

时间：2026-01-20 来源：未知

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UG-01056-3.0May2013

SynthesizingMegafunctionsinotherEDATools11

Options/ArgumentsDescription

--component-name=<variantname>-–file-set=QUARTUS_SYNTH--output-name[=<file_name>]

-–component-system-param=DEVICE_FAMILY=”<devicefamilyname>”–-component-param[=<parameter_name>][=<parameter_value>]

Specifiesthemegafunctionvariantname.

Aparameterthatisusedbytheip-generatortospecifyanoutputfile.Validextensionsare.v,.sv,.vhd,or.tdf.Specifiesthetargetdevicefamily.

Specifiesthetargetdevicefamily.

SynthesizingMegafunctionsinotherEDATools

YoucanusesupportedEDAtoolstosynthesizeadesignthatincludesmegafunctions.Whenyougeneratemegafunctionsynthesisfilesforusewiththird-partyEDAsynthesistools,youcanoptionallycreateanareaandtimingestimationnetlist.

areaandtimingestimationnetlistdescribethemegafunctionconnectivityandarchitecture,butnotdetailsabouttruefunctionality(greybox).Thisinformationenablescertainthird-partysynthesistoolstobetterreportareaandtimingestimates.Inaddition,synthesistoolscanusethetiminginformationtoachievetiming-drivenoptimizationsandimprovethequalityofresults.

Thenetlistfileiscalled<variantname>_syn.vfile.TheQuartus

IIsoftwaregeneratesthisfileinVerilogHDLformatregardlessoftheoutputfileformatyouspecify.Ifyouusethisnetlistforsynthesis,youmustincludethemegafunctionwrapperfile<variantname>.vor<variantname>.vhdinyourQuartusIIprojectforplacementandrouting.

IntroductiontoMegafunctionIPCoresAlteraCorporation

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